1. Field of the Invention
The present invention relates to a semiconductor memory device in which MOS elements are used.
2. Discription of the Related Art
Japanese Patent Laid-Open No. 287164/1986 discloses a method of manufacturing a high-density memory device by forming band-shaped diffused layers at regular intervals on a semiconductor substrate, covering these diffused layers with an oxide film, and forming band-shaped polysilicon layers on the oxide film at regular intervals in such a manner that these polysilicon layers intersect the diffused layers and thus form a grating-like structure. Each intersection in the grating-like structure forms a source region or a drain region of one MOS transistor, while a portion of each polysilicon layer between the source region and the drain region forms a gate of the MOS transistor.
Normally, a polysilicon layer constitutes a word line of the memory device, while a diffused layer constitutes a bit line of the memory device. In a memory device having such construction, since the diffused layers extend over a relatively long distance, the parasitic impedance of each of the diffused layers has a non-negligible value, and may cause a reduction in the operation speed of the memory device. In order to eliminate this disadvantageous effect of the parasitic impedance, it is known to provide a band-shaped metal layer immediately above each of the diffused layers.
In this case, it is necessary to form contact holes for effecting contact between the metal layers and the diffused layers. However, since fine-forming techniques used to form the metal layers involve various limitations, it is difficult to reduce the area required for forming each contact hole. As a result, in a case where the above-described metal layers are provided, it is necessary to increase the intervals at which the diffused layers are formed. This in turn makes it difficult to increase the density of the elements of the memory device.